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DS1822-PAR
The DS1822-PAR samples the 1-Wire bus during a window that lasts from 15 μ s to 60 μ s after the master
initiates the write-time slot. If the bus is high during the sampling window, a 1 is written to the DS1822-
PAR. If the line is low, a 0 is written to the DS1822-PAR.
READ/WRITE-TIME SLOT TIMING DIAGRAM Figure 12
START
OF SLOT
START
OF SLOT
V PU
1-WIRE BUS
GND
MASTER WRITE “0” SLOT
60 μ s < T X “0” < 120 μ s
DS1822-PAR samples
MASTER WRITE “1” SLOT
1 μ s < T REC < ∞
> 1 μ s
DS1822-PAR samples
MIN
TYP
MAX
MIN
TYP
MAX
15 μ s
15 μ s
30 μ s
15 μ s
15 μ s
30 μ s
V PU
1-WIRE BUS
GND
MASTER READ “0” SLOT
MASTER READ “1” SLOT
1 μ s < T REC < ∞
> 1 μ s
Master samples
> 1 μ s
Master samples
15 μ s
45 μ s
LINE TYPE LEGEND
Bus master pulling low
15 μ s
DS1822-PAR pulling low
Resistor pullup
READ-TIME SLOTS
The DS1822-PAR can only transmit data to the master when the master issues read-time slots. Therefore,
the master must generate read-time slots immediately after issuing a Read Scratchpad [BEh] command,
so that the DS1822-PAR can provide the requested data. In addition, the master can generate read-time
slots after issuing a Recall E 2 [B8h] command to find out the recall status as explained in the DS1822-
PAR FUNCTION COMMAND section.
All read-time slots must be a minimum of 60 μ s in duration with a minimum of a 1 μ s recovery time
between slots. A read-time slot is initiated by the master device pulling the 1-Wire bus low for a
minimum of μ s and then releasing the bus (see Figure 12). After the master initiates the read-time slots,
the DS1822-PAR will begin transmitting a 1 or 0 on bus. The DS1822-PAR transmits a 1 by leaving the
bus high and transmits a 0 by pulling the bus low. When transmitting a 0, the DS1822-PAR will release
the bus by the end of the time slot, and the bus will be pulled back to its high idle state by the pullup
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